the sy89420v device consists of two identical, low jitter, digital phase locked loops based on micrel-synergy's differential pll technology. each of the plls (plla and pllb) is capable of operating in the 30mhz to 560mhz input reference frequency range independently of the other and is configurable separately. the plls can be configured to be matched in all regards, or can be configured so that pllb is used as a frequency doubler, while plla is used to regenerate the undoubled frequency. two reference inputs (rinx and rinx), two feedback inputs (finx and finx), two filter pins (f1x and f2x) and two differential outputs (foutx and foutx) are provided for each of the two plls. the reference and feedback inputs can be used as either differential or single-ended inputs. in single-ended mode rinx and finx can be connected to either v bb for normal 100k pecl levels or v th for normal ttl levels. feedback for the loops is realized by connecting foutx, foutx to finx, finx by means of external circuitry. this allows the user the flexibility of inserting additional circuitry off-chip in the feedback paths, such as a divider. pulldown resistors are required for the foutx and foutx pins. use of a phase-frequency detector results in excellent pll locking and tracking characteristics. error correction voltages are generated by the detector if either phase or frequency deviations occur. the vco has a frequency range covering more than a 2:1 ratio from 480mhz to 1120mhz. select pins s1x and s2x are used to program the n dividers for optimum vco operation, in other words with the vco in the center of its range. additional select pins, s3b and s4b, are provided for pllb. when both s3b and s4b are low, pllb is identical to plla. when s3b is high, n b can be set to 1, 10, 18, or 20. when s4b is high, the frequency doubler option is enabled (p = 2). all select pins are ttl compatible. features 3.3v and 5v power supply options 1.12ghz maximum vco frequency 30mhz to 560mhz reference input operating frequency frequency doubler mode low jitter design pecl differential outputs pecl and ttl reference voltages available external loop filter optimizes performance/cost available in 28-pin plcc package description clockworks sy89420v final 5v/3.3v dual phase locked loop applications workstations advanced communications high-end consumer high-performance computing pin configuration s2a f1a f2a foutb v cc 26 27 28 1 2 3 4 18 17 16 15 14 13 12 25 24 23 22 21 20 19 567891011 top view plcc j28-1 s1b s2b f1b f2b s3b finb s4b rinb v ee rina rina v bb s1a v th fina v ccob foutb fouta fouta v ccoa fina finb rinb 1 rev.: k amendment: /0 issue date: may 2000
2 clockworks sy89420v micrel block diagram rinb rina fouta fouta rina loop filter vco fina d fina ?n a (2, 4, 8, 16) rinb vco finb d finb loop filter f1b f2b foutb foutb ? p (1, 2) s4b d f1a f2a phase-frequency detector phase-frequency detector s1a s2a s1b s2b s3b v bb v th ? n b (1,2,4,8,10,12,16,20)
3 clockworks sy89420v micrel pin description rina, rina, rinb, rinb reference frequency inputs for loop a and b. these are differential signal pairs and may be driven differentially or single-ended. fina, fina, finb, finb feedback frequency inputs for loop a and b. these are differential signal pairs and may be driven differentially or single-ended. v bb , v th these are the reference voltages for use as bias for the frequency inputs. the references are generated on-chip. v bb is pecl compatible, while v th is ttl compatible. f1a, f2a, f1b, f2b these pins are connection points for the loop filters, which are to be provided off-chip. f1x is the high impedance side, f2x is the reference side. the loop filter should be a first order, low pass with a dc block. the difference voltage on these pins will be a dc level, which is controlled by the loop feedback and determined by the required vco frequency. fouta, fouta, foutb, foutb frequency outputs for the loops. these are differential, positive referenced, emitter-follower signals and must be terminated off-chip. termination in 50 ohms is recommended. s1a, s2a, s1b, s2b, s3b, s4b these inputs are used to select the configuration for plla and pllb. they are compatible with standard ttl signal levels. see the frequency selection table for details of the logic. v cc this is the positive supply for the entire chip excluding output buffers. it should be decoupled and present a very low impedance in order to assure low-jitter operation. v ccoa , v ccob these are the positive supplies for the output buffers. they are constrained to be equal to the value of v cc . they should be decoupled and present a very low impedance in order to assure low-jitter operation. v ee this pin is the negative supply for the chip and is normally connected to ground (0v). c = 1.0 f 10% (x7r dielectric) r = 560 ? 10% loop filter component selection pin function i/o f1a filter pin 1a i/o f2a filter pin 2a i/o rina reference input a i rina inverted reference input a i fina feedback input a i fina inverted feedback input a i fouta frequency output a o fouta inverted frequency output a o f1b filter pin 1b i/o f2b filter pin 2b i/o rinb reference input b i rinb inverted reference input b i finb feedback input b i finb inverted feedback input b i foutb frequency output b o foutb inverted frequency output b o v cc v cc v ccoa output a v cc v ccob output b v cc v ee v ee (0v) v bb pecl threshold voltage o v th ttl threshold voltage o s1a select input 1a (ttl) i s2a select input 2a (ttl) i s1b select input 1b (ttl) i s2b select input 2b (ttl) i s3b select input 3b (ttl) i s4b select input 4b (ttl) i pin names f2x r c f1x
4 clockworks sy89420v micrel s3b s2b s1b divide-by-n output frequency range (mhz) 0 0 0 n =2 240 560 0 0 1 n = 4 120 280 0 1 0 n = 8 60 140 0 1 1 n = 16 30 70 1 0 0 n = 1 480 1120 1 0 1 n = 10 48 112 1 1 0 n = 12 40 93.3 1 1 1 n = 20 24 56 s2a s1a divide-by-n output frequency range (mhz) 0 0 n = 2 240 560 0 1 n = 4 120 280 1 0 n = 8 60 140 1 1 n = 16 30 70 frequency selection table plla pllb s4b divide-by-p max. feedback frequency (mhz) 0 p =1 560 1 p = 2 1120 symbol parameter value unit v cc power supply voltage 0.5 to +7.0 v v i ttl input voltage (2) 0.5 to 6.0 v i i ttl input current (2) 30 to +5.0 ma i out ecl output current ma continuous 50 surge 100 t store storage temperature 65 to +150 c t a operating temperature range (3) 0 to +85 c absolute maximum ratings (1) notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum r ating conditions for extended periods may affect device reliability. 2. either voltage limit or current limit is sufficient to protect input. 3. all dc and ac electrical characteristics are specified over the operating temperature range.
5 clockworks sy89420v micrel symbol parameter min. typ. max. unit condition v cc power supply voltage 4.75 5.25 v v cc = v cco i cc power supply current (v cc ) 200 ma i cco power supply current (v cco ) 28 ma pecl outputs are open 5v dc electrical characteristics v cc = v ccoa = v ccob = 5.0v 5% symbol parameter min. typ. max. unit condition v cc power supply voltage 3.135 3.465 v v cc = v cco i cc power supply current (v cc ) 200 ma i cco power supply current (v cco ) 28 ma pecl outputs are open 3.3v dc electrical characteristics v cc = v ccoa = v ccob = 3.3v 5% pecl dc electrical characteristics symbol parameter min. typ. max. unit condition v oh output high voltage v cc 1.025 v cc 0.780 v v ol output low voltage v cc 1.810 v cc 1.520 v v ih input high voltage v cc 1.165 v cc 0.780 v v il input low voltage v cc 1.810 v cc 1.475 v v bb pecl threshold v cc 1.35 v v cc = v ccoa = v ccob = 3.3v or 5.0v 5% symbol parameter min. typ. max. unit condition v ih input high voltage 2.0 v v il input low voltage 0.8 v i ih input high current 20 av in = 2.7v 100 v in = v cc i il input low current 0.3 ma v in = 0.5v v ik input clamp voltage 1.2 v i in = 12ma v th ttl threshold 1.5 v ttl dc electrical characteristics v cc = v ccoa = v ccob = 3.3v or 5.0v 5%
6 clockworks sy89420v micrel ordering package operating code type range sy89420vjc j28-1 commercial sy89420vjctr j28-1 commercial application product ordering code 50mhz low skew clock system with 100mhz clock to cpu symbol parameter min. typ. max. unit condition ? output period jitter 10 15 ps rms p pw output duty cycle 45 50 55 % tr output rise/fall time 300 550 ps tf (20% to 80%) 300 550 fouta output frequency plla 560 mhz foutb output frequency pllb 1120 mhz s4b=1 rina, b input frequency plla, b 560 mhz ac electrical characteristics v cc = v ccoa = v ccob = 3.3v or 5.0v 5% rina fina rinb finb plla pllb outa outa outb outb sy100h641 sy100h842 50mhz 100mhz sy89429a 16mh z sy89420v s2a = 1 s1a = 1 s4b = 1 s3b = 1 s2b = 0 s1b = 1 50mhz clock
7 clockworks sy89420v micrel 28 lead plcc (j28-1) rev. 03
8 clockworks sy89420v micrel micrel-synergy 3250 scott boulevard santa clara ca 95054 usa tel + 1 (408) 980-9191 fax + 1 (408) 914-7878 web http://www.micrel.com this information is believed to be accurate and reliable, however no responsibility is assumed by micrel for its use nor for an y infringement of patents or other rights of third parties resulting from its use. no license is granted by implication or otherwise under any patent or pat ent right of micrel inc. ? 2000 micrel incorporated
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